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Centre for Photonic Systems Engineering Department Electrical Engineering Division |
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![]() Vertically Integrated Systems for Information Transfer: VISIT Objective: The proposed STREP focuses on strategic, high-value photonic components and subsystems for scalable economic broadband access and local area networks. The central objective is research on, development, test and exploitation of system-enabling optical transmitters having a completely novel design and/or largely improved functionality as compared to the state of the art. The proposed STREP focuses on strategic, high-value photonic components and subsystems for scalable economic broadband access and local area networks. The central objective is research on, development, test and exploitation of system-enabling optical transmitters having a completely novel design and/or largely improved functionality as compared to the state of the art. Three key design and performance advancements will overcome limitations of present devices to become future-proof drivers of the European photonics industry: A novel nanophotonic approach of vertical integration of an electro-optic reflectance modulator and a laser implemented into: Vertically Cavity Surface Emitting Lasers based on Electro-Optically Modulated Bragg Reflector and Edge emitters based on Electro-Optically Modulated Tilted Wave Lasers constituting the basis for future access, local (LAN) and storage area (SAN) networks capable to speeds well beyond 40Gb/s. For applications at 16-40Gb/s (Fibre Channel, InfiniBand standards) a new generation of directly-modulated VCSELs will be developed to bridge the intermediate bandwidth demand in the fastest possible time frame. Epitaxial growth of these structures, processing and design of high-frequency modules will be challenging and demand detailed modelling. The wavelength ranges to be covered are 850nm, 980nm, and 1.3nm. While 850nm (LAN, SAN) and 1300nm (LAN, Access Networks) ranges are standard for applications, 980 nm devices may play an important role for very short links. Low power driver circuitry, as well as system integration and performance requirements will be also dealt with within this project. Upon completion a full supply chain from production of epitaxial wafers to test beds for measurements and prototype systems will be established. The economic impact of this work will be systematically enhanced by contributing directly to international standardization activities and roadmaps of this area. For further information visit http://www.subtune.eu/home/liblocal/docs/VCSEL_DAY_2010/Overview_of_the_EC_FP7_VISIT_Project_VCSEL_Day_Torino_07May10.pdf |
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